The present invention is related in general to the field of semiconductor device assembly and packaging, and more specifically to providing connections for power or ground in an integrated circuit (IC) package.
It is well known to use thin metallic bond wires for interconnecting a die and an IC package base, including interconnections for carrying, transferring, delivering, or distributing voltage and current signals related to power or ground circuits there between. The IC package base may include a leadframe or a laminate substrate. The use of thin metallic bond wires for carrying power or ground related voltage and current signals may limit the performance and reliability of the IC package. This is particularly true if relatively large currents are switched and delivered to the die in a high-speed manner. For example, presence of a resistance, a capacitance, and an inductance, or a combination thereof, in the bond wires within the IC package may increase voltage (or IR) drop across the bond wires, may limit the current capacity of the IC package, and may increase noise due to cross coupling within the IC package. Additionally, high average current densities may cause undesirable wearing out of the bond wires.
Other well known techniques to interconnect the die and the package base for carrying power or ground related electrical signals there between include the use of flip chip (FC) interconnect, use of thicker gold bond wires, post fabrication use of top aluminum layer on the die or plated thick copper layer, and core or intra-die bonding. However, many of the conventional techniques are often more expensive, complex or are still subjected to the bond wire limitations such as number, manufacturability, density, and thickness.